This invention relates to semiconductor memory devices, and more particularly to an N-channel silicon gate MOS read only memory and a process for making it.
Semiconductor memory devices are widely used in the manufacture of digital equipment such as minicomputers and microprocessor systems. Storage of fixed programs is usually provided in these systems by MOS read only memory devices or "ROMs". ROMs are made by semiconductor manufacturers on special order, the programming code being specified by the customer. The manufacturing process is lengthy, requiring dozens of steps, each taking up time and introducing materials handling and inventory factors. Customers require the turn-around time or cycle time between receipt of the ROM code for a custom order and delivery of finished parts to be kept as short as possible. For this reason, programming should be done late in the manufacturing process, but previous ways of doing this required large cell size. The economics of manufacture of ROMs, and of mounting them on circuit boards in the system, are such that the number of memory bits per semiconductor chip is advantageously as high as possible. ROMs of up to 32K bits (32768) are typical at present. Within a few years, standard sizes will progress through 64K, 128K, 256K and 1 megabit. This dictates that cell size for the storage cells of the ROM be quite small. Metal gate ROMS of small size can be relatively easily fabricated in the manner set forth in U.S. Pat. No. 3,541,543, assigned to Texas Instruments, but usually these are programmed by the gate level mask which is at an early stage in the process. Most microprocessor and computer parts are now made by the N-channel silicon gate process because of the shorter access times provided. In the past, the N-channel process has not been favorable to layout of ROM cells of small size and/or programming has been by the moat mask, also early in the process. N-channel ROMs are disclosed in prior applications Ser. No. 762,612, filed Jan. 29, 1977 U.S. Pat. No. 4,151,020 and Ser. No. 701,932, filed July 1, 1976, abandoned assigned to Texas Instruments. A method of programming a ROM by ion implant prior to forming the polysilicon gate is shown in U.S. Pat. No. 4,059,826 to Gerald D. Rogers, assigned to Texas Instruments. Also, previous cells have been programmed at the metal level mask by contact areas between metal lines and polysilicon gates, or by contacts between metal lines and N+ source or drain regions, using excessive space on the chip.
Methods of programming N-channel ROMS by implant through polysilicon gates are shown in my prior applications Ser. No. 890,555, 890,556, and 890,557, filed Mar. 20, 1978, assigned to Texas Instruments. These methods required that no metal overlie the gates so "SATO" type processing was used so that no metal was in the ROM array, or otherwise used processing different from the standard "NSAG" which is in large volume use.
It is the principal object of this invention to provide a semiconductor permanent store memory cell of small size which may be programmed at a later stage in the manufacturing process, yet still uses the standard high volume N-channel process. Another object is to provide a small-area MOS ROM cell which is made by the standard N-channel self-aligned silicon gate manufacturing process and is programmable after the polysilicon gates have been applied and patterned.